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This PR adds support for generative IOs and some smaller fixes:

fix: Custom plib not working with VHDL Makefile

  • Fix syntax for yosys call with custom plib in Makefile.

feat: Extend Code Generation

  • Add attributes to addPortVector and addPortSalar, to allow FABulous attributes to be added to the port description.
  • Add support for registers.
  • Add support for inverted ports, wires and registers.
  • Add support to add BelMaps to a module.

feat: Add generative IOs

  • Add Gen_IO feature.
  • API and CLI in seperate commit.
  • Docs in separate commit.

API/CLI: Add support for generative IOs

docs: Add generative IO docs

feat: Add unused tile dict to Fabric class

  • Unused tiles are listed in the fabric csv, but not used in the Fabric itself. It can be useful to have these, if one works tile based, and haven't defined a floorplan yet.

fix:tile_gen: Add bel comment only if there are bels in the tile

Fix syntax for yosys call with custom plib in Makefile.

Signed-off-by: Jonas K. <[email protected]>
Add attributes to addPortVector and addPortSalar, to allow FABulous
attributes to be added to the port description.

Add support for registers.

Add support for inverted ports, wires and registers.

Add support to add BelMaps to a module.

Signed-off-by: Jonas K. <[email protected]>
Add Gen_IO feature.
Docs in separate commit.

Signed-off-by: Jonas K. <[email protected]>
Unused tiles are listed in the fabric csv, but not used in the Fabric
itself. It can be useful to have these, if one works tile based, and
haven't defined a floorplan yet.

Signed-off-by: Jonas K. <[email protected]>
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Overall, it's just some minor issues, such as using logger.opt. The major one is the config bit update. Also, please add some tests for the CLI command and the new API. The API test can be very simple, like does it generate the file with something in it for now, and error test (does it raise an error if I does that). We can do the functional test later with cocotb later all together.

logger.error(f"Tile {tile_name} not found in fabric.")
raise ValueError

if self.writer.__class__ is VHDLWriter:
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Probably use the isinstance method will be better.

tile = self.fabric.getTileByName(tile_name)
bels: list[Bel] = []
if not tile:
logger.error(f"Tile {tile_name} not found in fabric.")
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Can use the logger.opt(exception=ValueError()).error(....), then you don't need to raise bellow

)
self.fabric.unusedTileDic[tile_name].bels += bels
else:
logger.error(
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logger.opt...

ret = self.tileDic.get(name)
if ret is None:
ret = self.unusedTileDic.get(name)
return ret
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Instead of returning None, I think we should raise an error.

@@ -252,10 +260,16 @@ def __repr__(self) -> str:
return fabric

def getTileByName(self, name: str) -> Tile | None:
return self.tileDic.get(name)
ret = self.tileDic.get(name)
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I think you will need the .get(name, None); otherwise, it will raise an error on the first get miss

)
else:
# generic multiplexer
if self.writer.__class__ == VHDLWriter:
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use isinstance()

self.writer.writeToFile()

bel: Bel
if self.writer.__class__ == VHDLWriter:
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same here

@@ -565,9 +584,77 @@ def parseTiles(fileName: Path) -> tuple[list[Tile], list[tuple[str, str]]]:
logger.info(f"Adding bels to custom prims file: {primsFile}")
addBelsToPrim(primsFile, [bels[-1]])
else:
raise ValueError(
logger.error(
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can use logger.opt


def getSuperTileByName(self, name: str) -> SuperTile | None:
return self.superTileDic.get(name)
ret = self.superTileDic.get(name)
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Same here

j = "" if gio.pins == 1 else f"{i}"
if gio.IO == IO.INPUT:
if gio.configAccess:
logger.error(
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.opt, there are a few in here as well.

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2 participants