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FPGA-Research / FABulous Public

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YosysJson Object#367

Draft

KelvinChung2000 wants to merge 3 commits intoFPGA-Research:FABulous2.0-developmentFPGA-Research/FABulous:FABulous2.0-developmentfrom

KelvinChung2000:yosys-objKelvinChung2000/FABulous:yosys-objCopy head branch name to clipboard

Conversation Commits3 (3)Checks Files changed

Draft

YosysJson Object#367
KelvinChung2000 wants to merge 3 commits intoFPGA-Research:FABulous2.0-developmentfrom
KelvinChung2000:yosys-obj

Commits

Commits on Jun 10, 2025

Yosys object and usage
KelvinChung2000
committed
format
KelvinChung2000
committed
Move HDL reading logic and fix
KelvinChung2000
committed

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