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riscv-bitmanip
riscv-bitmanip PublicForked from riscv/riscv-bitmanip
Working draft of the proposed RISC-V Bitmanipulation extension
Makefile
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riscv-code-size-reduction
riscv-code-size-reduction PublicForked from riscvarchive/riscv-code-size-reduction
Python
Repositories
- riscv-cheri Public Forked from riscv/riscv-cheri
This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
RISCV-SPEC/riscv-cheri’s past year of commit activity - riscv-iommu Public Forked from riscv-non-isa/riscv-iommu
Non-ISA IOMMU specification developed by the IOMMU TG.
RISCV-SPEC/riscv-iommu’s past year of commit activity - riscv-zabha Public Forked from riscv/riscv-zabha
The Zabha extension provides support for byte and halfword atomic memory operations.
RISCV-SPEC/riscv-zabha’s past year of commit activity - server-soc Public Forked from riscv-non-isa/server-soc
The repo holds the draft non-ISA Server SoC specification being developed by the Server SoC specification TG and to release intermediate releases of the specification on milestones. Further downstream this repo will be used to release specifications for public review.
RISCV-SPEC/server-soc’s past year of commit activity - riscv-sbi-doc Public Forked from riscv-non-isa/riscv-sbi-doc
Documentation for the RISC-V Supervisor Binary Interface
RISCV-SPEC/riscv-sbi-doc’s past year of commit activity - riscv-fast-interrupt Public Forked from riscv/riscv-fast-interrupt
Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
RISCV-SPEC/riscv-fast-interrupt’s past year of commit activity - riscv-spmp Public Forked from riscv/riscv-spmp
The repo contains the SPMP architectural specification, which includes capabilities like access control of read/write/execute requests by an hart, address matching, encoding of permissions, exceptions for access violation, and support for virtualization.
RISCV-SPEC/riscv-spmp’s past year of commit activity
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