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STM32: Add STM32C092 SoC support and NUCLEO-C092RC #93263
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.. zephyr:board-supported-runners:: | ||
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Nucleo C092RE board includes an ST-LINK/V2-1 embedded debug tool interface. |
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Nucleo C092RE board includes an ST-LINK/V2-1 embedded debug tool interface. | |
Nucleo C092RC board includes an ST-LINK/V2-1 embedded debug tool interface. |
Please check for similar typos you might have elsewhere
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Thanks for spotting the typo. Should be fixed now.
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There is a typo in message for commit tests: drivers: uart: uart_async_api: add nucleo_c092rc overlay
(STM32CO
instead of STM32C0
).
The following commits should come after the board is introduced:
tests: drivers: adc: adc_api: add overlay for nucleo_c092rc
tests: drivers: uart: uart_async_api: add nucleo_c092rc overlay
tests: drivers: counter: counter_basic_api: add nucleo_c092rc overlay
+ some remarks but otherwise LGTM on surface
Adds SoC support for the STM32C091, and the STM32C092 SoCs which are part of the STM32C0 series. Signed-off-by: Thomas Stranger <[email protected]>
On STM32C092 variants CAN-FD is supported, and the clock source can be chosen in the CCIPR1 register. This commit adds the helper to prepare that choice for the register. Signed-off-by: Thomas Stranger <[email protected]>
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Minor cosmetic remarks but LGTM otherwise.
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A few other cosmetic things I missed in previous review
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Minor comment otherwise LGTM
/delete-node/ &usb; | ||
/delete-node/ &usb_fs_phy; |
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I generally want to avoid use of /delete-node/ in such files.
For this specific set-up I don't have a simple way to avoid it today.
Though, we'll be able to remove it the day stm32c051 is introduced as stm32c051 is a stm32c071 w/o usb.
Please update your note to feature this so it is obvious for next one.
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I have added a comment to the stm32c091.dtsi file.
If you prefer to factor out the peripherals from the stm32c071.dtsi file, i.e. introduce the c051 line let me know.
I can't test it on stm32c051 specifically, but I don't think there would be much risk, given the errata of c051 doesn't list anything the c071 doesn't
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This is a nice offer @str4t0m. That would be indeed cool if you have some free cycles to do so. Additional benefit is that we'll then have the complete support of the series ✔️
Add dts support for the STM32C091 and STM32C092 SoCs, that are part of the STM32C0 series. Signed-off-by: Thomas Stranger <[email protected]>
Add the counter nodes (compat st,stm32-counter) to all timers of the STM32C0 series. Signed-off-by: Thomas Stranger <[email protected]>
Adds definitions for the nucleo_c092rc supporting the STM32C092RC entry-level MCU with CAN-FD support. The series does not have a pll, so with the given 48MHz CAN core clock frequency the internal timing calculation can't find parameters for 5MHz data bitrate, and for 8MHz they have an error of 84/1000. Signed-off-by: Thomas Stranger <[email protected]>
Add an overlay to use adc1 channel 0 (on PA0) for testing. Signed-off-by: Thomas Stranger <[email protected]>
Add a overlay for the nucleo_c092 testing usart4 and dma channels 6 and 7. These are all not available in smaller STM32C0 SoCs. Signed-off-by: Thomas Stranger <[email protected]>
Add a overlay to the counter_basic_api test to enable the counter node of TIM2, TIM3, and TIM14 to TIM17. Signed-off-by: Thomas Stranger <[email protected]>
Add an overlay to the st specific power_mgmt wkup_pins sample for the nucleo_c092rc board. The user_button on pc13 is used as the wakeup-src. Signed-off-by: Thomas Stranger <[email protected]>
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Add STM32C091/STM32C092 as a member of the STM32C0 family with additional timer, serial interfaces and CAN-FD(C092 only) support.