Make sure LPUART1 works on stm32l431/3

Also implements LSE as clock source

Author: calebissharp

src/rcc.rs

@@ -164,7 +164,7 @@ pub enum LpUart1ClockSource {
     Pclk = 0b00,
     Sysclk = 0b01,
     Hsi16 = 0b10,
-    Lsi = 0b11
+    Lse = 0b11,
 }
 
 /// Peripherals independent clock configuration register
@@ -626,15 +626,21 @@ impl CFGR {
         // Check if HSI should be started
         let lpuart1_clk_from_hsi = match self.lpuart1_src {
             LpUart1ClockSource::Hsi16 => {
-                rcc.ccipr.modify(|_, w| unsafe { w.lpuart1sel().bits(self.lpuart1_src as u8) });
+                rcc.ccipr
+                    .modify(|_, w| unsafe { w.lpuart1sel().bits(self.lpuart1_src as u8) });
                 true
             }
-            LpUart1ClockSource::Lsi => {
-                todo!()
+            LpUart1ClockSource::Lse => {
+                rcc.ccipr
+                    .modify(|_, w| unsafe { w.lpuart1sel().bits(self.lpuart1_src as u8) });
+                false
             }
             _ => false,
         };
-        if pll_source == PllSource::HSI16 || (self.msi.is_none() && self.hse.is_none()) || lpuart1_clk_from_hsi {
+        if pll_source == PllSource::HSI16
+            || (self.msi.is_none() && self.hse.is_none())
+            || lpuart1_clk_from_hsi
+        {
             rcc.cr.modify(|_, w| w.hsion().set_bit());
             while rcc.cr.read().hsirdy().bit_is_clear() {}
         }
@@ -845,7 +851,7 @@ impl CFGR {
             timclk1: timclk1.Hz(),
             timclk2: timclk2.Hz(),
             pll_source: pllconf.map(|_| pll_source),
-            lpuart1_src: self.lpuart1_src
+            lpuart1_src: self.lpuart1_src,
         }
     }
 }

src/serial.rs

@@ -41,6 +41,8 @@ use crate::time::{Bps, U32Ext};
     // feature = "stm32l4s7",
     feature = "stm32l4r9",
     feature = "stm32l4s9",
+    feature = "stm32l433",
+    feature = "stm32l431",
 ))]
 use crate::dma::dma2;
 
@@ -221,10 +223,16 @@ pub struct Tx<USART> {
 }
 
 macro_rules! potentially_uncompilable {
-    (true, $expr:expr) => { $expr };
+    (true, $expr:expr) => {
+        $expr
+    };
     (false, $expr:expr) => {};
-    (true, $expr_true:expr, $expr_false:expr) => { $expr_true };
-    (false, $expr_true:expr, $expr_false:expr) => { $expr_false };
+    (true, $expr_true:expr, $expr_false:expr) => {
+        $expr_true
+    };
+    (false, $expr_true:expr, $expr_false:expr) => {
+        $expr_false
+    };
 }
 
 macro_rules! hal {
@@ -281,7 +289,7 @@ macro_rules! hal {
                         match config.oversampling {
                             Oversampling::Over8 => {
                                 let uartdiv = 2 * clocks.$pclkX().raw() / config.baudrate.0;
-                                assert!(uartdiv >= 16, "impossible baud rate");
+                                assert!(uartdiv >= 16, "impossible baud rate 1");
 
                                 let lower = (uartdiv & 0xf) >> 1;
                                 let brr = (uartdiv & !0xf) | lower;
@@ -291,7 +299,7 @@ macro_rules! hal {
                             }
                             Oversampling::Over16 => {
                                 let brr = clocks.$pclkX().raw() / config.baudrate.0;
-                                assert!(brr >= 16, "impossible baud rate");
+                                assert!(brr >= 16, "impossible baud rate 2");
 
                                 usart.brr.write(|w| unsafe { w.bits(brr) });
                             }
@@ -303,9 +311,9 @@ macro_rules! hal {
                             LpUart1ClockSource::Pclk => clocks.$pclkX().raw(),
                             LpUart1ClockSource::Sysclk => clocks.sysclk().raw(),
                             LpUart1ClockSource::Hsi16 => 16_000_000,
-                            LpUart1ClockSource::Lsi => 32_768,
+                            LpUart1ClockSource::Lse => 32_768,
                         };
-                        assert!((fck >= 3 * config.baudrate.0) && (fck <= 4096 * config.baudrate.0), "impossible baud rate");
+                        assert!((fck >= 3 * config.baudrate.0) && (fck <= 4096 * config.baudrate.0), "impossible baud rate 3");
                         let brr = 256u64 * (fck as u64) / config.baudrate.0 as u64;
                         let brr = brr as u32;
                         usart.brr.write(|w| unsafe { w.bits(brr) });
@@ -935,6 +943,11 @@ hal! {
     LPUART1: (lpuart1, pclk1, tx: (TxDmaL1, dma2::C6, DmaInput::LpUart1Tx), rx: (RxDmaL1, dma2::C7, DmaInput::LpUart1Rx), false,),
 }
 
+#[cfg(any(feature = "stm32l431", feature = "stm32l433",))]
+hal! {
+    LPUART1: (lpuart1, pclk1, tx: (TxDmaL1, dma2::C6, DmaInput::LpUart1Tx), rx: (RxDmaL1, dma2::C7, DmaInput::LpUart1Rx), false,),
+}
+
 impl<USART, PINS> fmt::Write for Serial<USART, PINS>
 where
     Serial<USART, PINS>: crate::hal::serial::Write<u8>,
@@ -1173,6 +1186,8 @@ impl_pin_traits! {
     // feature = "stm32l4s7",
     // feature = "stm32l4r9",
     // feature = "stm32l4s9",
+    feature = "stm32l433",
+    feature = "stm32l431",
 ))]
 impl_pin_traits! {
     LPUART1: {