Skip to content

Check if NVC could replace GHDL for VHDL simluation #378

Open
@EverythingElseWasAlreadyTaken

Description

Our VHDL simulation with GHDL is pretty slow compared to the Verilog simulation.
It's roughly 5x slower with GHDL mcode and 15x slower with GHDL LLVM or GCC, compared to IVerilog.

Maybe NVC VHDL simulator is faster?
Does it have any other benefits/drawbacks ?

Metadata

Metadata

Assignees

No one assigned

    Labels

    Type

    No type

    Projects

    No projects

    Relationships

    None yet

    Development

    No branches or pull requests

    Issue actions