Hardware revision adjustments (PRD-10)

ESP-IDF.patch

@@ -0,0 +1,79 @@
+Subject: [PATCH] FPU_context_fix
+---
+Index: components/xtensa/xtensa_vectors.S
+IDEA additional info:
+Subsystem: com.intellij.openapi.diff.impl.patch.CharsetEP
+<+>UTF-8
+===================================================================
+diff --git a/components/xtensa/xtensa_vectors.S b/components/xtensa/xtensa_vectors.S
+--- a/components/xtensa/xtensa_vectors.S	(revision 3a45d4e949a174e8829a2e4c86c421b030ceac5a)
++++ b/components/xtensa/xtensa_vectors.S	(date 1751100427699)
+@@ -3,7 +3,7 @@
+  *
+  * SPDX-License-Identifier: MIT
+  *
+- * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD
++ * SPDX-FileContributor: 2016-2023 Espressif Systems (Shanghai) CO LTD
+  */
+ /*
+  * Copyright (c) 2015-2019 Cadence Design Systems, Inc.
+@@ -1016,6 +1016,12 @@
+     s32i    a2,  sp, XT_STK_A2
+     s32i    a3,  sp, XT_STK_A3
+     s32i    a4,  sp, XT_STK_A4
++#if portNUM_PROCESSORS > 1
++    /* If multicore, we must save two more interruptee's register to use as
++     * scratch when taking/releasing the _xt_coproc_owner_sa_lock spinlock. */
++    s32i    a6,  sp, XT_STK_A6
++    s32i    a7,  sp, XT_STK_A7
++#endif /* portNUM_PROCESSORS > 1 */
+     s32i    a15, sp, XT_STK_A15
+
+     /* Call the RTOS coprocessor exception hook */
+@@ -1046,7 +1052,7 @@
+ #if portNUM_PROCESSORS > 1
+     /* If multicore, we must also acquire the _xt_coproc_owner_sa_lock spinlock
+      * to ensure thread safe access of _xt_coproc_owner_sa between cores. */
+-    spinlock_take a0 a2 _xt_coproc_owner_sa_lock
++    spinlock_take a6 a7 _xt_coproc_owner_sa_lock
+ #endif /* portNUM_PROCESSORS > 1 */
+
+     /* Get old coprocessor owner thread (save area ptr) and assign new one.  */
+@@ -1057,7 +1063,7 @@
+
+ #if portNUM_PROCESSORS > 1
+     /* Release previously taken spinlock */
+-    spinlock_release a0 a2 _xt_coproc_owner_sa_lock
++    spinlock_release a6 a7 _xt_coproc_owner_sa_lock
+ #endif /* portNUM_PROCESSORS > 1 */
+
+     /* Only need to context switch if new owner != old owner. */
+@@ -1140,6 +1146,10 @@
+     /* Can omit rsync for wsr.CPENABLE here because _xt_user_exit does it. */
+ .L_xt_coproc_done:
+     l32i    a15, sp, XT_STK_A15
++#if portNUM_PROCESSORS > 1
++    l32i    a6,  sp, XT_STK_A6
++    l32i    a7,  sp, XT_STK_A7
++#endif /* portNUM_PROCESSORS > 1 */
+     l32i    a5,  sp, XT_STK_A5
+     l32i    a4,  sp, XT_STK_A4
+     l32i    a3,  sp, XT_STK_A3
+@@ -1153,13 +1163,17 @@
+     bnone   a2,  a0, .L_xt_coproc_done      /* if no match then done     */
+     and     a2,  a2, a0                     /* a2 = which CPs to restore */
+     extui   a2,  a2, 0, 8                   /* extract low 8 bits        */
++#if portNUM_PROCESSORS == 1
+     s32i    a6,  sp, XT_STK_A6              /* save extra needed regs    */
+     s32i    a7,  sp, XT_STK_A7
++#endif /* portNUM_PROCESSORS == 1 */
+     s32i    a13, sp, XT_STK_A13
+     s32i    a14, sp, XT_STK_A14
+     call0   _xt_coproc_restorecs            /* restore CP registers      */
++#if portNUM_PROCESSORS == 1
+     l32i    a6,  sp, XT_STK_A6              /* restore saved registers   */
+     l32i    a7,  sp, XT_STK_A7
++#endif /* portNUM_PROCESSORS == 1 */
+     l32i    a13, sp, XT_STK_A13
+     l32i    a14, sp, XT_STK_A14
+     j       .L_xt_coproc_done

JPEGDEC.patch

@@ -0,0 +1,25 @@
+Subject: [PATCH] JPEGDEC
+---
+Index: CMakeLists.txt
+IDEA additional info:
+Subsystem: com.intellij.openapi.diff.impl.patch.CharsetEP
+<+>UTF-8
+===================================================================
+diff --git a/CMakeLists.txt b/CMakeLists.txt
+--- a/CMakeLists.txt	(revision 4abe058cada9174c199f0f2c449a4e00d942e95a)
++++ b/CMakeLists.txt	(date 1753101338433)
+@@ -1,8 +1,8 @@
+-set(srcs 
+-    "src/JPEGDEC.cpp"
+-    "src/jpeg.inl"
++set(srcs
++        "src/JPEGDEC.cpp"
++        "src/jpeg.inl"
+ )
+-idf_component_register(SRCS ${srcs}      
+-                    REQUIRES "jpegdec"
+-                    INCLUDE_DIRS "src"
++idf_component_register(SRCS ${srcs}
++        #                    REQUIRES "jpegdec"
++        INCLUDE_DIRS "src"
+ )

LovyanGFX.patch

@@ -0,0 +1,19 @@
+Subject: [PATCH] LovyanGFX
+---
+Index: src/lgfx/v1/platforms/esp32/common.cpp
+IDEA additional info:
+Subsystem: com.intellij.openapi.diff.impl.patch.CharsetEP
+<+>UTF-8
+===================================================================
+diff --git a/src/lgfx/v1/platforms/esp32/common.cpp b/src/lgfx/v1/platforms/esp32/common.cpp
+--- a/src/lgfx/v1/platforms/esp32/common.cpp	(revision d0beeee9d680c6967926b7593e3f73a907064321)
++++ b/src/lgfx/v1/platforms/esp32/common.cpp	(date 1753101338445)
+@@ -834,7 +834,7 @@
+   || (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 3, 0))
+       (&dev->comd[0])[index].val = cmd_val;
+  #else
+-      (&dev->comd0)[index].val = cmd_val;
++      (&dev->comd[0])[index].val = cmd_val;
+  #endif
+ #else
+       dev->command[index].val = cmd_val;

README.md

@@ -1,24 +1,84 @@
 # Artemis Watch Firmware
 
 # Building
-To build the Artemis base firmware, you'll need the ESP-IDF. You can find the getting started 
-guide [here](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/). The 
-production firmware is built using IDF version 5.1, commit [3a45d4e](https://github.com/espressif/esp-idf/tree/3a45d4e949a174e8829a2e4c86c421b030ceac5a).
 
-In the root directory of the project:
+To build the Artemis base firmware, you'll need the ESP-IDF. You can find the getting started
+guide [here](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/). The
+production firmware is built using IDF version 5.1,
+commit [3a45d4e](https://github.com/espressif/esp-idf/tree/3a45d4e949a174e8829a2e4c86c421b030ceac5a).
+
+### ESP-IDF patching
+
+Contained in the repository is [ESP-IDF.patch](ESP-IDF.patch).
+The patch addresses [issues](https://github.com/espressif/esp-idf/issues/11690) in IDF v5.1
+related to FPU registers during context switching.
+
+For proper code functioning, apply this patch onto your ESP-IDF installation path using:
+
+```shell
+cd /esp-idf-path/
+git apply ESP-IDF.patch
+```
+
+Clone all submodules from the project root
+
+```shell
+git submodule update --init --recursive
+```
+
+### JPEGDEC patching
+
+Contained in the repository is [JPEGDEC.patch](JPEGDEC.patch).
+Apply it onto the cloned JPEGDEC submodule:
+
+```shell
+cd components/JPEGDEC
+git apply ../../JPEGDEC.patch
+```
+
+### LovyanGFX patching
+
+Contained in the repository is [LovyanGFX.patch](LovyanGFX.patch).
+Apply it onto the cloned LovyanGFX submodule:
+
+```shell
+cd components/LovyanGFX
+git apply ../../LovyanGFX.patch
+```
+
+After patching everything, in the root directory of the project:
 
 **To build the firmware** run ```idf.py build```
 
-**To upload the firmware to the device** run ```idf.py -p <PORT> flash```. Replace `<PORT>` with 
+**To upload the firmware to the device** run ```idf.py -p <PORT> flash```. Replace `<PORT>` with
 the port Artemis is attached to, for ex. ```COM6``` or ```/dev/ttyACM0```.
 
+### Merging a single binary file
+
+After building (or flashing) the firmware, you can merge the resulting files into a single
+binary file. This is useful for sharing a build or flashing it directly onto the board.
+
+The necessary tool for this is [esptool](https://github.com/espressif/esptool), which comes
+preinstalled with ESP-IDF
+
+From the project root go into your build folder (usually just /build):
+
+```shell
+cd build
+esptool --chip esp32s3 merge_bin --fill-flash-size 4MB -o ../Artemis.bin --flash_mode dio 
+--flash_freq 80m --flash_size 4MB 0x0 bootloader/bootloader.bin 0x10000 Artemis-Firmware.bin 0x8000 partition_table/partition-table.bin 0x2f6000 storage.bin
+```
+
 # Restoring the stock firmware
-To restore the stock firmware, you can download the prebuilt binary on the [releases page](https://github.com/CircuitMess/GC_Artemis-Firmware/releases) of this repository 
+
+To restore the stock firmware, you can download the prebuilt binary on
+the [releases page](https://github.com/CircuitMess/GC_Artemis-Firmware/releases) of this repository
 and flash it manually using esptool:
+
 ```shell
 esptool -c esp32s3 -b 921600 -p <PORT> write_flash 0 Artemis-Firmware.bin
 ```
 
-Alternatively, you can also do so using [CircuitBlocks](https://code.circuitmess.com/) by 
-logging in, clicking the "Restore Firmware" button in the top-right corner, and following the 
-on-screen instructions. 
+Alternatively, you can also do so using [CircuitBlocks](https://code.circuitmess.com/) by
+logging in, clicking the "Restore Firmware" button in the top-right corner, and following the
+on-screen instructions.

bootloader_components/init/hooks.c

@@ -1,14 +1,20 @@
 #include "esp_attr.h"
 #include "hal/gpio_hal.h"
+#include "hal/efuse_ll.h"
+#include "esp_log.h"
+
+static const char* TAG = "hook";
 
 /** Function used to tell the linker to include this file with all its symbols. */
 void bootloader_hooks_include(void){}
 
-static const gpio_num_t PWDN = GPIO_NUM_42;
+
+//Note: This works since LED pins are the same across all revisions.
+//Change if necessary (GPIOs could mess up another hardware revision)
 static const gpio_num_t LEDs[] = { 17, 18, 43, 44, 45, 46 };
 
 void setLEDs(){
-	for(int i = 0; i < sizeof(LEDs)/sizeof(LEDs[0]); i++){
+	for(int i = 0; i < sizeof(LEDs) / sizeof(LEDs[0]); i++){
 		const uint8_t pin = LEDs[i];
 		gpio_ll_pullup_dis(&GPIO, pin);
 		gpio_ll_pulldown_dis(&GPIO, pin);
@@ -19,16 +25,77 @@ void setLEDs(){
 	}
 }
 
+void readEfuse(uint16_t* PID, uint8_t* Revision){
+	/**
+	 * Reading is done using raw register reads.
+	 * Using the 'efuse' component results in crashes (TG0WDT_SYS_RST) !!!
+	 *
+	 * Block 3 = User block
+	 * 00 00 XX YY | ZZ 00 00 00
+	 * XX - lower byte of PID
+	 * YY - upper byte of PID
+	 * ZZ - Revision byte
+	 */
+
+	//Byteswapping is applied to have the same appearance as in 'espefuse summary' (v4.8.1)
+	uint32_t reg = REG_READ(EFUSE_RD_USR_DATA0_REG);
+	uint32_t reversedReg = (((reg) & 0xff000000) >> 24) | (((reg) & 0x00ff0000) >> 8) | (((reg) & 0x0000ff00) << 8) | (((reg) & 0x000000ff) << 24);
+	uint16_t readPID = ((reversedReg & 0xFF00) >> 8 )| ((reversedReg & 0xFF) << 8);
+
+	reg =  REG_READ(EFUSE_RD_USR_DATA1_REG);
+	reversedReg = (((reg) & 0xff000000) >> 24) | (((reg) & 0x00ff0000) >> 8) | (((reg) & 0x0000ff00) << 8) | (((reg) & 0x000000ff) << 24);
+	uint8_t readRevision = ((reversedReg & 0xFF000000) >> 24);
+
+	ESP_LOGI(TAG, "PID: %d, rev: %d", readPID, readRevision);
+
+	*PID = readPID;
+	*Revision = readRevision;
+}
+
 void IRAM_ATTR bootloader_before_init(void){
 	/* Keep in my mind that a lot of functions cannot be called from here
 	 * as system initialization has not been performed yet, including
 	 * BSS, SPI flash, or memory protection. */
 	// ESP_LOGI("HOOK", "This hook is called BEFORE bootloader initialization");
 
+
+	//WARNING - proceed with caution around PWDN (powerdown) pin!
+	//Setting it to low (0) during bootloader WILL brick the device!
+
+
+	uint8_t Revision = 0;
+	uint16_t PID = 0;
+	gpio_num_t PWDN;
+	gpio_num_t BacklightLED;
+
+	readEfuse(&PID, &Revision);
+
+	if(PID == 0 && Revision == 0){
+		PWDN = GPIO_NUM_37;
+		BacklightLED = GPIO_NUM_33;
+		ESP_LOGI(TAG, "Unfused Rev2 assumed from bootloader");
+	}else if(Revision == 2){
+		PWDN = GPIO_NUM_37;
+		BacklightLED = GPIO_NUM_33;
+		ESP_LOGI(TAG, "Rev2 from bootloader");
+	}else{
+		PWDN = GPIO_NUM_42;
+		BacklightLED = -1;
+		ESP_LOGI(TAG, "Rev1 from bootloader");
+	}
+
 	gpio_ll_input_enable(&GPIO, PWDN);
 	gpio_ll_pulldown_dis(&GPIO, PWDN);
 	gpio_ll_pullup_dis(&GPIO, PWDN);
 
+	if(BacklightLED != -1){
+		gpio_ll_pullup_en(&GPIO, BacklightLED);
+		gpio_ll_pulldown_dis(&GPIO, BacklightLED);
+		gpio_ll_input_disable(&GPIO, BacklightLED);
+		gpio_ll_output_enable(&GPIO, BacklightLED);
+		gpio_ll_set_level(&GPIO, BacklightLED, 1);
+	}
+
 	setLEDs();
 }