diff --git a/soc/nordic/nrf53/Kconfig b/soc/nordic/nrf53/Kconfig
index 8aade63f54a15..7260d5c7d66d3 100644
--- a/soc/nordic/nrf53/Kconfig
+++ b/soc/nordic/nrf53/Kconfig
@@ -210,69 +210,6 @@ config BOARD_ENABLE_CPUNET
 
 if !TRUSTED_EXECUTION_NONSECURE || BUILD_WITH_TFM
 
-config SOC_ENABLE_LFXO
-	bool "LFXO"
-	select DEPRECATED
-	help
-	  This option is deprecated, use DT instead. For this option to apply,
-	  make sure to select either "internal" or "external" in the
-	  load-capacitors property.
-
-	  Enable the low-frequency oscillator (LFXO) functionality on XL1 and
-	  XL2 pins.
-	  This option must be enabled if either application or network core is
-	  to use the LFXO. Otherwise, XL1 and XL2 pins will behave as regular
-	  GPIOs.
-
-choice SOC_LFXO_LOAD_CAPACITANCE
-	prompt "LFXO load capacitance"
-	depends on SOC_ENABLE_LFXO
-
-config SOC_LFXO_CAP_EXTERNAL
-	bool "Use external load capacitors"
-	select DEPRECATED
-	help
-	  This option is deprecated, use DT instead. Example configuration:
-
-	  &lfxo {
-	      load-capacitors = "external";
-	  };
-
-config SOC_LFXO_CAP_INT_6PF
-	bool "6 pF internal load capacitance"
-	select DEPRECATED
-	help
-	  This option is deprecated, use DT instead. Example configuration:
-
-	  &lfxo {
-	      load-capacitors = "internal";
-	      load-capacitance-picofarad = <6>;
-	  };
-
-config SOC_LFXO_CAP_INT_7PF
-	bool "7 pF internal load capacitance"
-	select DEPRECATED
-	help
-	  This option is deprecated, use DT instead. Example configuration:
-
-	  &lfxo {
-	      load-capacitors = "internal";
-	      load-capacitance-picofarad = <7>;
-	  };
-
-config SOC_LFXO_CAP_INT_9PF
-	bool "9 pF internal load capacitance"
-	select DEPRECATED
-	help
-	  This option is deprecated, use DT instead. Example configuration:
-
-	  &lfxo {
-	      load-capacitors = "internal";
-	      load-capacitance-picofarad = <9>;
-	  };
-
-endchoice
-
 choice SOC_HFXO_LOAD_CAPACITANCE
 	prompt "HFXO load capacitance"
 	default SOC_HFXO_CAP_DEFAULT
diff --git a/soc/nordic/nrf53/soc.c b/soc/nordic/nrf53/soc.c
index e53a3e75231b8..3ffa6c1615ebf 100644
--- a/soc/nordic/nrf53/soc.c
+++ b/soc/nordic/nrf53/soc.c
@@ -54,22 +54,17 @@
 #define HFXO_NODE DT_NODELABEL(hfxo)
 
 /* LFXO config from DT */
+#if DT_NODE_HAS_STATUS_OKAY(LFXO_NODE)
+BUILD_ASSERT(DT_NODE_HAS_PROP(LFXO_NODE, load_capacitors));
+#define LFXO_PIN_SEL NRF_GPIO_PIN_SEL_PERIPHERAL
 #if DT_ENUM_HAS_VALUE(LFXO_NODE, load_capacitors, external)
 #define LFXO_CAP NRF_OSCILLATORS_LFXO_CAP_EXTERNAL
 #elif DT_ENUM_HAS_VALUE(LFXO_NODE, load_capacitors, internal)
 #define LFXO_CAP (DT_ENUM_IDX(LFXO_NODE, load_capacitance_picofarad) + 1U)
+#endif /*DT_ENUM_HAS_VALUE(LFXO_NODE, load_capacitors, external) */
 #else
-/* LFXO config from legacy Kconfig */
-#if defined(CONFIG_SOC_LFXO_CAP_INT_6PF)
-#define LFXO_CAP NRF_OSCILLATORS_LFXO_CAP_6PF
-#elif defined(CONFIG_SOC_LFXO_CAP_INT_7PF)
-#define LFXO_CAP NRF_OSCILLATORS_LFXO_CAP_7PF
-#elif defined(CONFIG_SOC_LFXO_CAP_INT_9PF)
-#define LFXO_CAP NRF_OSCILLATORS_LFXO_CAP_9PF
-#else
-#define LFXO_CAP NRF_OSCILLATORS_LFXO_CAP_EXTERNAL
-#endif
-#endif
+#define LFXO_PIN_SEL NRF_GPIO_PIN_SEL_APP
+#endif /* DT_NODE_HAS_STATUS_OKAY(LFXO_NODE) */
 
 /* HFXO config from DT */
 #if DT_ENUM_HAS_VALUE(HFXO_NODE, load_capacitors, internal)
@@ -496,17 +491,17 @@ void soc_early_init_hook(void)
 #endif
 
 #ifdef CONFIG_SOC_NRF5340_CPUAPP
-#if defined(LFXO_CAP)
+#if DT_NODE_HAS_STATUS_OKAY(LFXO_NODE)
 	nrf_oscillators_lfxo_cap_set(NRF_OSCILLATORS, LFXO_CAP);
 #if !defined(CONFIG_BUILD_WITH_TFM)
 	/* This can only be done from secure code.
 	 * This is handled by the TF-M platform so we skip it when TF-M is
 	 * enabled.
 	 */
-	nrf_gpio_pin_control_select(PIN_XL1, NRF_GPIO_PIN_SEL_PERIPHERAL);
-	nrf_gpio_pin_control_select(PIN_XL2, NRF_GPIO_PIN_SEL_PERIPHERAL);
+	nrf_gpio_pin_control_select(PIN_XL1, LFXO_PIN_SEL);
+	nrf_gpio_pin_control_select(PIN_XL2, LFXO_PIN_SEL);
 #endif /* !defined(CONFIG_BUILD_WITH_TFM) */
-#endif /* defined(LFXO_CAP) */
+#endif /* DT_NODE_HAS_STATUS_OKAY(LFXO_NODE) */
 #if defined(HFXO_CAP_VAL_X2)
 	/* This register is only accessible from secure code. */
 	uint32_t xosc32mtrim = soc_secure_read_xosc32mtrim();