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soc: nordic: nrf53: assign pin xl1,xl2 to app core if lfxo disabled
Fixes #92663 Disabled LFXO via devicetree allows pin 0.00 and 0.01 to work correctly as gpio by assigning it to the app core instead of peripheral. Removed deprecated Kconfig options so DT is the only config path now. Signed-off-by: Ivynya Lu <[email protected]>
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soc/nordic/nrf53/Kconfig

Lines changed: 0 additions & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -210,69 +210,6 @@ config BOARD_ENABLE_CPUNET
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if !TRUSTED_EXECUTION_NONSECURE || BUILD_WITH_TFM
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config SOC_ENABLE_LFXO
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bool "LFXO"
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select DEPRECATED
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help
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This option is deprecated, use DT instead. For this option to apply,
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make sure to select either "internal" or "external" in the
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load-capacitors property.
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Enable the low-frequency oscillator (LFXO) functionality on XL1 and
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XL2 pins.
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This option must be enabled if either application or network core is
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to use the LFXO. Otherwise, XL1 and XL2 pins will behave as regular
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GPIOs.
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choice SOC_LFXO_LOAD_CAPACITANCE
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prompt "LFXO load capacitance"
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depends on SOC_ENABLE_LFXO
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config SOC_LFXO_CAP_EXTERNAL
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bool "Use external load capacitors"
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select DEPRECATED
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help
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This option is deprecated, use DT instead. Example configuration:
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&lfxo {
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load-capacitors = "external";
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};
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config SOC_LFXO_CAP_INT_6PF
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bool "6 pF internal load capacitance"
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select DEPRECATED
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help
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This option is deprecated, use DT instead. Example configuration:
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&lfxo {
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load-capacitors = "internal";
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load-capacitance-picofarad = <6>;
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};
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config SOC_LFXO_CAP_INT_7PF
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bool "7 pF internal load capacitance"
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select DEPRECATED
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help
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This option is deprecated, use DT instead. Example configuration:
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&lfxo {
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load-capacitors = "internal";
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load-capacitance-picofarad = <7>;
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};
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config SOC_LFXO_CAP_INT_9PF
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bool "9 pF internal load capacitance"
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select DEPRECATED
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help
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This option is deprecated, use DT instead. Example configuration:
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&lfxo {
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load-capacitors = "internal";
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load-capacitance-picofarad = <9>;
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};
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endchoice
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choice SOC_HFXO_LOAD_CAPACITANCE
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prompt "HFXO load capacitance"
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default SOC_HFXO_CAP_DEFAULT

soc/nordic/nrf53/soc.c

Lines changed: 10 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -54,22 +54,17 @@
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#define HFXO_NODE DT_NODELABEL(hfxo)
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/* LFXO config from DT */
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#if DT_NODE_HAS_STATUS_OKAY(LFXO_NODE)
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BUILD_ASSERT(DT_NODE_HAS_PROP(LFXO_NODE, load_capacitors));
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#define LFXO_PIN_SEL NRF_GPIO_PIN_SEL_PERIPHERAL
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#if DT_ENUM_HAS_VALUE(LFXO_NODE, load_capacitors, external)
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#define LFXO_CAP NRF_OSCILLATORS_LFXO_CAP_EXTERNAL
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#elif DT_ENUM_HAS_VALUE(LFXO_NODE, load_capacitors, internal)
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#define LFXO_CAP (DT_ENUM_IDX(LFXO_NODE, load_capacitance_picofarad) + 1U)
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#endif /*DT_ENUM_HAS_VALUE(LFXO_NODE, load_capacitors, external) */
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#else
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/* LFXO config from legacy Kconfig */
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#if defined(CONFIG_SOC_LFXO_CAP_INT_6PF)
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#define LFXO_CAP NRF_OSCILLATORS_LFXO_CAP_6PF
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#elif defined(CONFIG_SOC_LFXO_CAP_INT_7PF)
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#define LFXO_CAP NRF_OSCILLATORS_LFXO_CAP_7PF
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#elif defined(CONFIG_SOC_LFXO_CAP_INT_9PF)
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#define LFXO_CAP NRF_OSCILLATORS_LFXO_CAP_9PF
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#else
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#define LFXO_CAP NRF_OSCILLATORS_LFXO_CAP_EXTERNAL
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#endif
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#endif
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#define LFXO_PIN_SEL NRF_GPIO_PIN_SEL_APP
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#endif /* DT_NODE_HAS_STATUS_OKAY(LFXO_NODE) */
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/* HFXO config from DT */
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#if DT_ENUM_HAS_VALUE(HFXO_NODE, load_capacitors, internal)
@@ -496,17 +491,17 @@ void soc_early_init_hook(void)
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#endif
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#ifdef CONFIG_SOC_NRF5340_CPUAPP
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#if defined(LFXO_CAP)
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#if DT_NODE_HAS_STATUS_OKAY(LFXO_NODE)
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nrf_oscillators_lfxo_cap_set(NRF_OSCILLATORS, LFXO_CAP);
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#if !defined(CONFIG_BUILD_WITH_TFM)
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/* This can only be done from secure code.
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* This is handled by the TF-M platform so we skip it when TF-M is
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* enabled.
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*/
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nrf_gpio_pin_control_select(PIN_XL1, NRF_GPIO_PIN_SEL_PERIPHERAL);
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nrf_gpio_pin_control_select(PIN_XL2, NRF_GPIO_PIN_SEL_PERIPHERAL);
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nrf_gpio_pin_control_select(PIN_XL1, LFXO_PIN_SEL);
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nrf_gpio_pin_control_select(PIN_XL2, LFXO_PIN_SEL);
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#endif /* !defined(CONFIG_BUILD_WITH_TFM) */
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#endif /* defined(LFXO_CAP) */
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#endif /* DT_NODE_HAS_STATUS_OKAY(LFXO_NODE) */
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#if defined(HFXO_CAP_VAL_X2)
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/* This register is only accessible from secure code. */
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uint32_t xosc32mtrim = soc_secure_read_xosc32mtrim();

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