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Implement LPUART1 for STM32L476.
(cherry picked from commit 1cf3332)
1 parent 1adf2c9 commit 51218a6

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+59
-26
lines changed

1 file changed

+59
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‎src/serial.rs

Lines changed: 59 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ use crate::hal::serial::{self, Write};
1414
use crate::dma::{dma1, CircBuffer, DMAFrame, FrameReader, FrameSender};
1515
use crate::gpio::{self, Alternate, AlternateOD, Floating, Input};
1616
use crate::pac;
17-
use crate::rcc::{Clocks, APB1R1, APB2};
17+
use crate::rcc::{Clocks, APB1R1, APB1R2, APB2};
1818
use crate::time::{Bps, U32Ext};
1919

2020
#[cfg(any(feature = "stm32l4x5", feature = "stm32l4x6",))]
@@ -187,6 +187,13 @@ pub struct Tx<USART> {
187187
_usart: PhantomData<USART>,
188188
}
189189

190+
macro_rules! potentially_uncompilable {
191+
(true, $expr:expr) => { $expr };
192+
(false, $expr:expr) => {};
193+
(true, $expr_true:expr, $expr_false:expr) => { $expr_true };
194+
(false, $expr_true:expr, $expr_false:expr) => { $expr_false };
195+
}
196+
190197
macro_rules! hal {
191198
($(
192199
$(#[$meta:meta])*
@@ -197,7 +204,8 @@ macro_rules! hal {
197204
$usartXrst:ident,
198205
$pclkX:ident,
199206
tx: ($dmacst:ident, $tx_chan:path),
200-
rx: ($dmacsr:ident, $rx_chan:path)
207+
rx: ($dmacsr:ident, $rx_chan:path),
208+
$is_full_uart:ident,
201209
),
202210
)+) => {
203211
$(
@@ -246,7 +254,7 @@ macro_rules! hal {
246254
let lower = (uartdiv & 0xf) >> 1;
247255
let brr = (uartdiv & !0xf) | lower;
248256

249-
usart.cr1.modify(|_, w| w.over8().set_bit());
257+
potentially_uncompilable!($is_full_uart, { usart.cr1.modify(|_, w| w.over8().set_bit()); });
250258
usart.brr.write(|w| unsafe { w.bits(brr) });
251259
}
252260
Oversampling::Over16 => {
@@ -257,9 +265,11 @@ macro_rules! hal {
257265
}
258266
}
259267

260-
if let Some(val) = config.receiver_timeout {
261-
usart.rtor.modify(|_, w| w.rto().bits(val));
262-
}
268+
potentially_uncompilable!($is_full_uart, {
269+
if let Some(val) = config.receiver_timeout {
270+
usart.rtor.modify(|_, w| w.rto().bits(val));
271+
}
272+
});
263273

264274
// enable DMA transfers
265275
usart.cr3.modify(|_, w| w.dmat().set_bit().dmar().set_bit());
@@ -278,9 +288,11 @@ macro_rules! hal {
278288

279289
// Enable One bit sampling method
280290
usart.cr3.modify(|_, w| {
281-
if config.onebit_sampling {
282-
w.onebit().set_bit();
283-
}
291+
potentially_uncompilable!($is_full_uart, {
292+
if config.onebit_sampling {
293+
w.onebit().set_bit();
294+
}
295+
});
284296

285297
if config.disable_overrun {
286298
w.ovrdis().set_bit();
@@ -326,9 +338,11 @@ macro_rules! hal {
326338
w.add().bits(c);
327339
}
328340

329-
if config.receiver_timeout.is_some() {
330-
w.rtoen().set_bit();
331-
}
341+
potentially_uncompilable!($is_full_uart, {
342+
if config.receiver_timeout.is_some() {
343+
w.rtoen().set_bit();
344+
}
345+
});
332346

333347
w
334348
});
@@ -360,7 +374,7 @@ macro_rules! hal {
360374
self.usart.cr1.modify(|_, w| w.cmie().set_bit())
361375
},
362376
Event::ReceiverTimeout => {
363-
self.usart.cr1.modify(|_, w| w.rtoie().set_bit())
377+
potentially_uncompilable!($is_full_uart, { self.usart.cr1.modify(|_, w| w.rtoie().set_bit()) });
364378
},
365379
}
366380
}
@@ -391,7 +405,7 @@ macro_rules! hal {
391405
self.usart.cr1.modify(|_, w| w.cmie().clear_bit())
392406
},
393407
Event::ReceiverTimeout => {
394-
self.usart.cr1.modify(|_, w| w.rtoie().clear_bit())
408+
potentially_uncompilable!($is_full_uart, { self.usart.cr1.modify(|_, w| w.rtoie().clear_bit()) });
395409
},
396410
}
397411
}
@@ -635,14 +649,16 @@ macro_rules! hal {
635649
let isr = unsafe { &(*pac::$USARTX::ptr()).isr.read() };
636650
let icr = unsafe { &(*pac::$USARTX::ptr()).icr };
637651

638-
if isr.rtof().bit_is_set() {
639-
if clear {
640-
icr.write(|w| w.rtocf().set_bit() );
652+
potentially_uncompilable!($is_full_uart, {
653+
if isr.rtof().bit_is_set() {
654+
if clear {
655+
icr.write(|w| w.rtocf().set_bit() );
656+
}
657+
true
658+
} else {
659+
false
641660
}
642-
true
643-
} else {
644-
false
645-
}
661+
}, { false })
646662
}
647663

648664
/// Check for, and return, any errors
@@ -722,8 +738,8 @@ macro_rules! hal {
722738
}
723739

724740
hal! {
725-
USART1: (usart1, APB2, usart1en, usart1rst, pclk2, tx: (c4s, dma1::C4), rx: (c5s, dma1::C5)),
726-
USART2: (usart2, APB1R1, usart2en, usart2rst, pclk1, tx: (c7s, dma1::C7), rx: (c6s, dma1::C6)),
741+
USART1: (usart1, APB2, usart1en, usart1rst, pclk2, tx: (c4s, dma1::C4), rx: (c5s, dma1::C5), true,),
742+
USART2: (usart2, APB1R1, usart2en, usart2rst, pclk1, tx: (c7s, dma1::C7), rx: (c6s, dma1::C6), true,),
727743
}
728744

729745
#[cfg(any(
@@ -733,17 +749,22 @@ hal! {
733749
feature = "stm32l4x6",
734750
))]
735751
hal! {
736-
USART3: (usart3, APB1R1, usart3en, usart3rst, pclk1, tx: (c2s, dma1::C2), rx: (c3s, dma1::C3)),
752+
USART3: (usart3, APB1R1, usart3en, usart3rst, pclk1, tx: (c2s, dma1::C2), rx: (c3s, dma1::C3), true,),
737753
}
738754

739755
#[cfg(any(feature = "stm32l4x5", feature = "stm32l4x6",))]
740756
hal! {
741-
UART4: (uart4, APB1R1, uart4en, uart4rst, pclk1, tx: (c3s, dma2::C3), rx: (c5s, dma2::C5)),
757+
UART4: (uart4, APB1R1, uart4en, uart4rst, pclk1, tx: (c3s, dma2::C3), rx: (c5s, dma2::C5), true,),
742758
}
743759

744760
#[cfg(any(feature = "stm32l4x5", feature = "stm32l4x6",))]
745761
hal! {
746-
UART5: (uart5, APB1R1, uart5en, uart5rst, pclk1, tx: (c1s, dma2::C1), rx: (c2s, dma2::C2)),
762+
UART5: (uart5, APB1R1, uart5en, uart5rst, pclk1, tx: (c1s, dma2::C1), rx: (c2s, dma2::C2), true,),
763+
}
764+
765+
#[cfg(feature = "stm32l4x6")]
766+
hal! {
767+
LPUART1: (lpuart1, APB1R2, lpuart1en, lpuart1rst, pclk1, tx: (c6s, dma2::C6), rx: (c7s, dma2::C7), false,),
747768
}
748769

749770
impl<USART, PINS> fmt::Write for Serial<USART, PINS>
@@ -907,6 +928,18 @@ impl_pin_traits! {
907928
}
908929
}
909930

931+
#[cfg(feature = "stm32l4x6")]
932+
impl_pin_traits! {
933+
LPUART1: {
934+
AF8: {
935+
TX: PB11;
936+
RX: PB10;
937+
RTS_DE: ;
938+
CTS: ;
939+
}
940+
}
941+
}
942+
910943
/// Pins trait for detecting hardware flow control or RS485 mode.
911944
pub trait Pins<USART> {
912945
const FLOWCTL: bool;

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